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Silicon Labs /Series0 /EZR32WG /EZR32WG330F256R60 /LESENSE /PERCTRL

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Interpret as PERCTRL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DACCH0DATA)DACCH0DATA 0 (DACCH1DATA)DACCH1DATA 0 (DISABLE)DACCH0CONV 0 (DISABLE)DACCH1CONV 0 (DISABLE)DACCH0OUT 0 (DISABLE)DACCH1OUT 0DACPRESC0 (DACREF)DACREF 0 (DISABLE)ACMP0MODE 0 (DISABLE)ACMP1MODE 0 (NORMAL)WARMUPMODE

DACCH1OUT=DISABLE, ACMP1MODE=DISABLE, DACCH0OUT=DISABLE, DACCH1CONV=DISABLE, WARMUPMODE=NORMAL, DACCH0CONV=DISABLE, ACMP0MODE=DISABLE

Description

Peripheral Control Register

Fields

DACCH0DATA

DAC CH0 data selection.
DACCH1DATA

DAC CH1 data selection.
DACCH0CONV

DAC channel 0 conversion mode

0 (DISABLE): LESENSE does not control DAC CH0.

1 (CONTINUOUS): DAC channel 0 is driven in continuous mode.

2 (SAMPLEHOLD): DAC channel 0 is driven in sample hold mode.

3 (SAMPLEOFF): DAC channel 0 is driven in sample off mode.
DACCH1CONV

DAC channel 1 conversion mode

0 (DISABLE): LESENSE does not control DAC CH1.

1 (CONTINUOUS): DAC channel 1 is driven in continuous mode.

2 (SAMPLEHOLD): DAC channel 1 is driven in sample hold mode.

3 (SAMPLEOFF): DAC channel 1 is driven in sample off mode.
DACCH0OUT

DAC channel 0 output mode

0 (DISABLE): DAC CH0 output to pin and ACMP/ADC disabled

1 (PIN): DAC CH0 output to pin enabled, output to ADC and ACMP disabled

2 (ADCACMP): DAC CH0 output to pin disabled, output to ADC and ACMP enabled

3 (PINADCACMP): DAC CH0 output to pin, ADC, and ACMP enabled.
DACCH1OUT

DAC channel 1 output mode

0 (DISABLE): DAC CH1 output to pin and ACMP/ADC disabled

1 (PIN): DAC CH1 output to pin enabled, output to ADC and ACMP disabled

2 (ADCACMP): DAC CH1 output to pin disabled, output to ADC and ACMP enabled

3 (PINADCACMP): DAC CH1 output to pin, ADC, and ACMP enabled.
DACPRESC

DAC prescaler configuration.
DACREF

DAC bandgap reference used
ACMP0MODE

ACMP0 mode

0 (DISABLE): LESENSE does not control ACMP0

1 (MUX): LESENSE controls the input mux (POSSEL) of ACMP0

2 (MUXTHRES): LESENSE controls the input mux (POSSEL) and the threshold value (VDDLEVEL) of ACMP0
ACMP1MODE

ACMP1 mode

0 (DISABLE): LESENSE does not control ACMP1

1 (MUX): LESENSE controls the input mux (POSSEL) of ACMP1

2 (MUXTHRES): LESENSE controls the input mux and the threshold value (VDDLEVEL) of ACMP1
WARMUPMODE

ACMP and DAC duty cycle mode

0 (NORMAL): The analog comparators and DAC are shut down when LESENSE is idle

1 (KEEPACMPWARM): The analog comparators are kept powered up when LESENSE is idle

2 (KEEPDACWARM): The DAC is kept powered up when LESENSE is idle

3 (KEEPACMPDACWARM): The analog comparators and DAC are kept powered up when LESENSE is idle

Links

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Register License

  • SPDX-License-Identifier: Zlib
  • The licensor of this software is Silicon Laboratories Inc.
  • This software is provided ‘as-is’, without any express or implied
  • warranty. In no event will the authors be held liable for any damages
  • arising from the use of this software.
  • Permission is granted to anyone to use this software for any purpose,
  • including commercial applications, and to alter it and redistribute it
  • freely, subject to the following restrictions:
    1. The origin of this software must not be misrepresented; you must not
  • claim that you wrote the original software. If you use this software
  • in a product, an acknowledgment in the product documentation would be
  • appreciated but is not required.
    1. Altered source versions must be plainly marked as such, and must not be
  • misrepresented as being the original software.
    1. This notice may not be removed or altered from any source distribution.
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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data